Video subsystems for driving video displays often employ video digital-to-analog converters (DACs) for generating any of numerous discrete level currents. These currents are sent to the video display via a transmission line, such as a coaxial cable, which is terminated at each end by an appropriate termination resistor. Typically, the voltage signals generated across these termination resistors by the currents transmitted along the transmission line conform to the well known RS343 computer monitor analog standard.
The DAC is loaded by parasitic impedances, including capacitances and inductances, established by the power supply circuitry connected to the DAC and the output circuitry connected to the DAC. Consequently, as current switching operations occur within the DAC, current fluctuations or surges occur in the power supply circuitry and in the output circuitry connected to the DAC. These current fluctuations adversely affect the image generated by the video display by causing visible distortion thereon. The problem is compounded further with current fluctuations in the power supply circuitry of the DAC, as these current changes cause positive noise feedback to the output circuitry of the DAC.
Furthermore, the switching rate of currents from the DAC must be increased in order to accommodate more sophisticated and higher resolution video displays. The trend in the industry relative to video displays is toward increasing the dot clock, or pixel clock, rate as well as the screen refresh rate. Hence, there is a heretofore unaddressed need in the industry for a system and methodology for increasing the rate of current switching in the DAC of a video subsystem, while minimizing current fluctuations in the power supply circuitry and output circuitry of the DAC, which result from parasitic impedances loading the DAC, in order to thereby eliminate adverse visual effects on the video display.